Apparatus and method for restarting an electronic device

ABSTRACT

This document discusses, among other things, apparatus and methods for restarting an electronic device configured to receive power from a main power supply and an auxiliary power supply. The electronic device includes a reset circuit a reset circuit configured to provide a first signal indicative of an electronic device failure, and an isolation circuit configured to isolate the main power supply from the auxiliary power supply in response to the first signal so that power is supplied to the reset circuit by the auxiliary power supply. The reset circuit can be configured to generate a reset signal for restarting the electronic device with the power supplied by the auxiliary power supply.

CLAIM OF PRIORITY

This application claims the benefit of priority under 35 U.S.C. §119(a)of Gavin Zhou et al. CN Application No. 201610130599X, filed on Feb. 15,2016, which is hereby incorporated by reference in its entirety.

TECHNICAL FIELD

This document relates generally to electronic devices and moreparticularly to apparatus and methods for restarting an electronicdevice.

BACKGROUND

Reset circuits, for example, watchdog timers, are widely applied inembedded electronic devices, such as mobile phones and tablets. When aprocessor of an electronic device no longer feeds a watchdog timer dueto an error, a counter on the watchdog timer will overflows, triggeringan interrupt request for restarting the processor of the electronicdevice.

In the prior art, a processor and reset circuit are powered by batteriesduring the restart of an electronic device, or powered by the externalpower supply when an electronic device is connected to an external powersupply with a power supply adapter. In any of the cases, it isimpossible to enable a forced restart of the electronic device.

The information disclosed above in the Background is merely intended tofacilitate the understanding of the background of the present invention.Therefore, it may contain information beyond what those of ordinaryskills in the art might have known about the prior art.

OVERVIEW

The exemplary embodiments provide an apparatus and method for restartingan electronic device and an electronic device including the apparatus,which can, in the event of a failure of an electronic device, isolate amain power supply and supply power to a reset circuit with an auxiliarypower supply so that the reset circuit generates a reset signal, therebyenabling a forced start of the electronic device.

According to an exemplary embodiment, an apparatus for restarting anelectronic device is provided, the electronic device configured toreceive power from a main power supply, and the apparatus including anauxiliary power supply, a reset circuit, and an isolation circuit. Inthis embodiment, the reset circuit is configured to send a first signalto the isolation circuit in response to a failure of the electronicdevice, and the isolation circuit is configured to isolate the mainpower supply of the electronic device from the auxiliary power supply inresponse to the first signal so that power is supplied to the resetcircuit by the auxiliary power supply. Further, the reset circuit isconfigured to generate a reset signal for restarting the electronicdevice with the power supplied by the auxiliary power supply.

According to another exemplary embodiment, an electronic deviceincluding the foregoing apparatus is provided.

According to another exemplary embodiment, a method for restarting anelectronic device is provided, including monitoring the operation of theelectronic device, isolating the main power supply from the auxiliarypower supply in response to a failure of the electronic device so thatpower is supplied to a reset circuit by the auxiliary power supply, andgenerating a reset signal for restarting the electronic device with thepower supplied by the auxiliary power supply.

This overview is intended to provide an overview of subject matter ofthe present patent application. It is not intended to provide anexclusive or exhaustive explanation of the invention. The detaileddescription is included to provide further information about the presentpatent application.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings, which are not necessarily drawn to scale, like numeralsmay describe similar components in different views. Like numerals havingdifferent letter suffixes may represent different instances of similarcomponents. The drawings illustrate generally, by way of example, butnot by way of limitation, various embodiments discussed in the presentdocument.

FIG. 1 illustrates an example schematic block diagram of a restartapparatus.

FIG. 2 illustrates an example restart circuit.

FIGS. 3A-3B illustrate example simulation results.

FIG. 4 illustrates an example restart method.

DETAILED DESCRIPTION

The following simply describes certain exemplary embodiments. Variousmodifications may be made to the embodiments under description withoutdeparting from the spirit or scope of the present invention, just aspossibly known by those skilled in the art. Thus, the drawings anddescription are essentially considered as illustrative rather thanrestrictive.

FIG. 1 illustrates an example schematic block diagram of a restartapparatus 110 according to various embodiments of the present subjectmatter. For ease of understanding, FIG. 1 also shows other parts relatedto a restart apparatus 110. In an example, a restart apparatus 110 maybe installed in an electronic device 100 (e.g., a mobile phone) tomonitor the operation of a processor 104 in the electronic device 100.When the processor 104 runs properly, the processor 104 and restartapparatus 110 are powered by a main power supply 102. When the restartapparatus 110 detects a failure of the processor 104, a reset signal issent to the processor 104.

In particular, as shown in FIG. 1, the apparatus 110 includes anauxiliary power supply 112, an isolation circuit 114, and a resetcircuit 116. The reset circuit 116 sends a power-switching controlsignal to the isolation circuit in response to a failure of theelectronic device 100. The isolation circuit 114 isolates the main powersupply 102 of the electronic device 100 from the auxiliary power supply112 in response to the power-switching control signal so that power issupplied to the reset circuit 116 by the auxiliary power supply 112(e.g., and not the main power supply 102). Then the reset circuit 116generates a reset signal for restarting the electronic device 100 withthe power supplied by the auxiliary power supply 112.

FIG. 2 illustrates an example restart circuit according to an embodimentof the present subject matter. FIG. 2 specifically shows a schematiccircuit of a restart apparatus 110 and other components in theelectronic device 100 that relate to the restart apparatus 110. As shownin FIG. 2, the electronic device 100 includes a main power supply 102, aprocessor 104, a Universal Serial Bus (USB) connector 106, and therestart apparatus 110.

The main power supply 102 includes a charger and power managementintegrated circuit (Charger+PMIC) 1022 and a main battery 1024. Inproper operation state, a high-voltage end B+ of the main battery 1024is connected to the power line VBAT, and a low-voltage end B− isconnected to the system ground (SYSTEM GND) so that the main battery1024 is connected to the processor 104 and the restart apparatus 110 tosupply power. When the electronic device 100 is connected to an externalpower supply via a USB connector 106, the Charger+PMIC 1022 may chargethe main battery 1024.

The restart apparatus 110 includes an auxiliary power supply 112, anisolation circuit 114, a reset circuit 116, a discharging circuit 118,and a clock switching circuit 120. In this example, the reset circuit116 is generally implemented by a watchdog timer circuit (which includesan I2C Slave). In this example, the auxiliary power supply 112 isconnected between a power line VBAT and an auxiliary ground AUX GND, andmay be implemented with, for example, a capacitor (e.g., 22 μF). In FIG.2, the isolation circuit 114 includes a transistor MO, which is used toisolate the auxiliary ground AUX GND of the auxiliary power supply 112from the system ground SYSTEM GND. In order to prevent a body diode ofthe transistor MO from burning, a current limiting resistor RO may beconnected in parallel between a source and a substrate of the transistorMO, and the current limiting resistor may have a resistance of, forexample, 100 ohm. Furthermore, the isolation circuit 114 may furtherinclude transistors M1 and M2 that are used to isolate the low-voltageend B− of the main power supply from the system ground SYSTEM GND.

When the electronic device 100 runs properly, the processor 104communicates with the watchdog timer via an I2C bus (including signallines INTB, I2C_SCL, and I2C_SDA) and periodically sends a watchdog feedsignal to the watchdog timer. Each time the watchdog timer receives thewatchdog feed signal, it resets its counter.

When the electronic device 100 fails (for example, a program ran by theprocessor 104 falls into an infinite loop), the processor 104 no longersends watchdog feed signals. When the watchdog timer has not been “fed”within a predetermined period of time, its counter will overflow,resulting in a high level output setting of a power-switching controlpin (BAT_SW_CTRL) connected to the main power supply 102. As a result ofthe high level signal (the details will not be repeated herein; pleaserefer to the logic circuit shown in FIG. 2), transistors M1 and M2 inthe isolation circuit 114 switch to a cut-off state, thereby isolatingthe low-voltage end B− of the main battery 1024 from the system groundSYSTEM GND, that is, isolating the main battery 1024 from the entiresystem. Moreover, as a result of a control signal associated with thehigh level signal output by the power-switching control pin(BAT_SW_CTRL), the transistor MO in the isolation circuit 114 switchesto a cut-off state, thereby isolating the auxiliary ground AUX GND ofthe auxiliary power supply 112 from the system ground SYSTEM GND. Thus,power supplied by the main power supply 112 to the processor 104 andreset circuit 116 is cut off, and the reset circuit 116 is only poweredby the auxiliary power supply 112 so that the reset circuit 116 mayperform a reset operation.

Subsequently, the power-switching control pin (BAT_SW_CTRL) switchesfrom a high-level output state to and remains in a high resistancestate, thus restoring the power supplied by the main battery 1024 to thesystem, and the reset circuit 116 outputs a reset signal RST_AP (whichis a low level in this example) to the processor 104, thereby restartingthe processor 104.

As shown in FIG. 2, the restart apparatus 110 further includes adischarging circuit 118 used to accelerate the release of remainingcharges in the system when power supplied to the system by the mainbattery 1024 is cut off, thereby accelerating the restarting process.

Furthermore, the restart apparatus 110 may further include a clockswitching circuit which is connected to the reset circuit 116 and usedto switch a clock provided to the reset circuit 116 to a clock at alower frequency when the reset circuit 116 is powered by the auxiliarypower supply 112, thereby reducing power consumption. When the powersupplied to the system by the main battery 1024 is restored, it isswitched back to a clock at a higher frequency. For example, in properoperation state, a clock signal at 125 kHz may be applied to thewatchdog timer, and when watchdog feed fails, a clock signal at 10 kHzis applied to the watchdog timer instead.

In an example, the watchdog timer may include a watchdog historyregister, which is used to record a watchdog feed failure for users toview. For example, 1 is added to the value of the register at eachwatchdog feed failure, and only power-on resetting and a specificwatchdog history resetting loop initiated by I2C can reset the registerto zero.

FIGS. 3A and 3B illustrate example simulation results of a specificapplication example of a restart apparatus according to an embodiment ofthe present subject matter.

As shown in FIG. 3A, when the processor does not respond, the watchdogfeed status (FEED DOG STATUS) indicates an exception and the watchdogtimer reaches a maximum (WD TIMING REACH MAX=1), a watchdog feed failureis indicated, and a reset operation (WATCHDOG RESET=1) is triggered;then the power-switching control pin changes its output to a high levelso that power supplied by the main battery is cut off; then thepower-switching control pin is restored to output a high resistance sothat the power supplied by the main battery is restored, and a reset pinchanges its output to a low level so as to output a reset signal to theprocessor; then the watchdog feed failure is recorded in the watchdoghistory register.

As shown in FIG. 3b , when the watchdog timer reaches the maximum (WDTIMING REACH MAX=1), a watchdog feed failure is indicated and a resetoperation (WATCHDOG RESET=1) is triggered, a clock frequency of thewatchdog timer (CLK 125K) switches from 125 kHz to 10 kHz, therebyreducing power consumption.

FIG. 4 shows a flow diagram of a restarting method 400 according tovarious embodiments of the present subject matter. At 402, operation ofan electronic device can be monitored. At 404, a main power supply canbe isolated from an auxiliary power supply in response to a failure ofthe electronic device so that power is supplied to a reset circuit bythe auxiliary power supply (e.g., and not the main power supply). At406, a reset signal for restarting the electronic device can begenerated with the power supplied by the auxiliary power supply (e.g.,and not power supplied by the main power supply).

In an example, a first signal generated by the reset circuit may be usedto control a first transistor so that the main power supply isdisconnected from the auxiliary one; and current that flows through abody diode of the first transistor is limited. In an example, after themain power supply is isolated from the auxiliary one, a dischargingcircuit may be used to release remaining charges in the electronicdevice. In an example, a time frequency of the reset circuit may beswitched from a first clock frequency to a second one in response to afailure of the electronic device, where the first clock frequency isgreater than the second one. In an example, each failure of theelectronic device may be recorded.

Additional Notes

An example (e.g., “Example 1”) of subject matter (e.g., an apparatus)may include a reset circuit configured to provide a first signalindicative of an electronic device failure; and an isolation circuitconfigured to isolate a main power supply from an auxiliary power supplyin response to the first signal so that power is supplied to the resetcircuit by the auxiliary power supply, wherein the reset circuit isconfigured to generate a reset signal for restarting the electronicdevice with the power supplied by the auxiliary power supply.

In Example 2, the subject matter of Example 1 may optionally beconfigured such that a first terminal of the main power supply isconnected to a first voltage terminal, a second terminal of the mainpower supply is connected to a first ground terminal, a first terminalof the auxiliary power supply is connected to a first voltage terminal,and a second terminal of the auxiliary power supply is connected to asecond ground terminal; and the isolation circuit can comprise a firsttransistor configured to disconnect the first ground terminal and thesecond ground terminal in response to a first signal from the resetcircuit, and a first current limiter configured to limit current flowthrough the body diode of the first transistor.

In Example 3, the subject matter of any one or more of Examples 1-2 mayoptionally be configured such that the first current limiter comprises aresistor.

In Example 4, the subject matter of any one or more of Examples 1-3 mayoptionally be configured such that the isolation circuit comprisessecond and third transistors, connected in series with each other, andconfigured to disconnect a second terminal of the main power supply fromthe first ground terminal in response to the first signal from the resetcircuit.

In Example 5, the subject matter of any one or more of Examples 1-4 mayoptionally be configured such that the auxiliary power supply comprisesa capacitor.

In Example 6, the subject matter of any one or more of Examples 1-5 mayoptionally be configured to include a discharge circuit configured torelease residual charges in the electronic device in response to afailure of the electronic device.

In Example 7, the subject matter of any one or more of Examples 1-6 mayoptionally be configured to include a clock switching circuit,configured to switch a clock frequency of the reset circuit from a firstclock frequency to a second clock frequency in response to a failure ofthe electronic device, wherein the first clock frequency is greater thanthe second clock frequency.

In Example 8, the subject matter of any one or more of Examples 1-9 mayoptionally be configured to include a history register configured torecord each failure of the electronic device.

In Example 9, the subject matter of any one or more of Examples 1-8 mayoptionally be configured such that the isolation circuit is configuredto isolate a main power supply from an auxiliary power supply inresponse to the first signal so that power is supplied to the resetcircuit by the auxiliary power supply, and not the main power supply.

An example (e.g., “Example 10”) of subject matter (e.g., an electronicdevice) may include a processor, a main power supply, and a restartapparatus, the restart apparatus comprising an auxiliary power supply, areset circuit, and an isolation circuit, wherein the reset circuit isconfigured to provide a first signal to the isolation circuit inresponse to a failure of the processor, the isolation circuit isconfigured to isolate the main power supply from the auxiliary powersupply in response to the first signal so that power is supplied to thereset circuit by the auxiliary power supply, and the reset circuit isconfigured to generate a reset signal for restarting the processor withthe power supplied by the auxiliary power supply.

In Example 11, the subject matter of Example 10 may optionally beconfigured such that a first terminal of the main power supply isconnected to a first voltage terminal, a second terminal of the mainpower supply is connected to a first ground terminal, a first terminalof the auxiliary power supply is connected to a first voltage terminal,and a second terminal of the auxiliary power supply is connected to asecond ground terminal; and the isolation circuit comprises a firsttransistor configured to disconnect the first ground terminal and thesecond ground terminal in response to a first signal from the resetcircuit and a first current limiter configured to limit current flowthrough the body diode of the first transistor.

In Example 12, the subject matter of any one or more of Examples 10-11may optionally be configured such that the isolation circuit comprisessecond and third transistors, connected in series with each other, andconfigured to disconnect a second terminal of the main power supply fromthe first ground terminal in response to the first signal from the resetcircuit.

In Example 13, the subject matter of any one or more of Examples 10-12may optionally be configured such that the auxiliary power supplycomprises a capacitor.

In Example 14, the subject matter of any one or more of Examples 10-13may optionally be configured such that the restart apparatus comprises adischarge circuit configured to release residual charges in theelectronic device in response to a failure of the electronic device.

In Example 15, the subject matter of any one or more of Examples 10-14may optionally be configured such that the restart apparatus comprises aclock switching circuit configured to switch a clock frequency of thereset circuit from a first clock frequency to a second clock frequencyin response to a failure of the electronic device, wherein the firstclock frequency is greater than the second clock frequency.

An example (e.g., “Example 16”) of subject matter (e.g., a method) mayinclude monitoring operation of an electronic device, isolating a mainpower supply of the electronic device from an auxiliary power supply ofthe electronic device in response to a failure of the electronic deviceso that power is supplied to a reset circuit by the auxiliary powersupply, and generating a reset signal for restarting the electronicdevice with the power supplied by the auxiliary power supply.

In Example 17, the subject matter of Example 16 may optionally beconfigured such that isolating the main power supply from the auxiliarypower supply comprises controlling a first transistor with a firstsignal generated by the reset circuit to disconnect the main powersupply from the auxiliary power supply, and limiting current flowthrough the body diode of the first transistor.

In Example 18, the subject matter of any one or more of Examples 16-17may optionally be configured to include releasing residual charges inthe electronic device through a discharge circuit after isolating themain power supply from the auxiliary power supply.

In Example 19, the subject matter of any one or more of Examples 16-18may optionally be configured to include switching a clock frequency ofthe reset circuit from a first clock frequency to a second clockfrequency in response to a failure of the electronic device, wherein thefirst clock frequency is greater than the second clock frequency.

In Example 20, the subject matter of any one or more of Examples 16-19may optionally be configured to include recording each failure of theelectronic device.

An example (e.g., “Example 21”) of subject matter (e.g., a system orapparatus) may optionally combine any portion or combination of anyportion of any one or more of Examples 1-20 to include “means for”performing any portion of any one or more of the functions or methods ofExamples 1-20, or a “machine-readable medium” (e.g., non-transitory,etc.) including instructions that, when performed by a machine, causethe machine to perform any portion of any one or more of the functionsor methods of Examples 1-20.

The above descriptions are merely specific implementation manners of thepresent invention, the protection scope of the present invention is notlimited thereto, and variations or replacements that can be easilyderived by persons skilled in the art without departing from thetechnical scope disclosed in the present invention shall fall within theprotection scope of the present invention. Therefore, the protectionscope of the present invention shall be subject to the protection scopeof the claims.

The above descriptions include references to the accompanying drawings,which form a part of the detailed description. The drawings show, by wayof illustration, specific embodiments in which the invention can bepracticed. These embodiments are also referred to herein as “examples.”Such examples can include elements in addition to those shown ordescribed. However, the present inventors also contemplate examples inwhich only those elements shown or described are provided. Moreover, thepresent inventors also contemplate examples using any combination orpermutation of those elements shown or described (or one or more aspectsthereof), either with respect to a particular example (or one or moreaspects thereof), or with respect to other examples (or one or moreaspects thereof) shown or described herein. If two elements are shown inthe drawings with a line connecting them, the two elements can be eitherbe coupled, or directly coupled, unless otherwise indicated. If twoelements are coupled, one or more intervening elements may be present.In contrast, in embodiments where an element is referred to as “directlycoupled” to another element, there can be no intervening elements inthose embodiments.

Method examples described herein can be machine or computer-implementedat least in part. Some examples can include a computer-readable mediumor machine-readable medium encoded with instructions operable toconfigure an electronic device to perform methods as described in theabove examples. An implementation of such methods can include code, suchas microcode, assembly language code, a higher-level language code, orthe like. Such code can include computer readable instructions forperforming various methods. The code may form portions of computerprogram products. Further, the code can be tangibly stored on one ormore volatile or non-volatile tangible computer-readable media, such asduring execution or at other times. Examples of these tangiblecomputer-readable media can include, but are not limited to, hard disks,removable magnetic disks, removable optical disks (e.g., compact disksand digital video disks), magnetic cassettes, memory cards or sticks,random access memories (RAMS), read only memories (ROMs), and the like.

The above description is intended to be illustrative, and notrestrictive. For example, the above-described examples (or one or moreaspects thereof) may be used in combination with each other. Otherembodiments can be used, such as by one of ordinary skill in the artupon reviewing the above description. The Abstract is provided to complywith 37 C.F.R. §1.72(b), to allow the reader to quickly ascertain thenature of the technical disclosure. It is submitted with theunderstanding that it will not be used to interpret or limit the scopeor meaning of the claims. Also, in the above Detailed Description,various features may be grouped together to streamline the disclosure.This should not be interpreted as intending that an unclaimed disclosedfeature is essential to any claim. Rather, inventive subject matter maylie in less than all features of a particular disclosed embodiment.Thus, the following claims are hereby incorporated into the DetailedDescription, with each claim standing on its own as a separateembodiment, and it is contemplated that such embodiments can be combinedwith each other in various combinations or permutations. The scope ofthe invention should be determined with reference to the appendedclaims, along with the full scope of equivalents to which such claimsare entitled.

What is claimed is:
 1. An apparatus, comprising: a reset circuitconfigured to provide a first signal indicative of an electronic devicefailure; and an isolation circuit configured to isolate a main powersupply from an auxiliary power supply in response to the first signal sothat power is supplied to the reset circuit by the auxiliary powersupply, wherein the reset circuit is configured to generate a resetsignal for restarting the electronic device with the power supplied bythe auxiliary power supply.
 2. The apparatus of claim 1, wherein a firstterminal of the main power supply is connected to a first voltageterminal, a second terminal of the main power supply is connected to afirst ground terminal, a first terminal of the auxiliary power supply isconnected to a first voltage terminal, and a second terminal of theauxiliary power supply is connected to a second ground terminal, andwherein the isolation circuit comprises: a first transistor configuredto disconnect the first ground terminal and the second ground terminalin response to a first signal from the reset circuit; and a firstcurrent limiter configured to limit current flow through the body diodeof the first transistor.
 3. The apparatus of claim 2, wherein the firstcurrent limiter comprises a resistor.
 4. The apparatus of claim 2,wherein the isolation circuit comprises: second and third transistors,connected in series with each other, and configured to disconnect asecond terminal of the main power supply from the first ground terminalin response to the first signal from the reset circuit.
 5. The apparatusof claim 1, wherein the auxiliary power supply comprises a capacitor. 6.The apparatus of claim 1, comprising: a discharge circuit configured torelease residual charges in the electronic device in response to afailure of the electronic device.
 7. The apparatus of claim 1,comprising: a clock switching circuit, configured to switch a clockfrequency of the reset circuit from a first clock frequency to a secondclock frequency in response to a failure of the electronic device,wherein the first clock frequency is greater than the second clockfrequency.
 8. The apparatus of claim 1, comprising: a history registerconfigured to record each failure of the electronic device.
 9. Theapparatus of claim 1, wherein the isolation circuit is configured toisolate a main power supply from an auxiliary power supply in responseto the first signal so that power is supplied to the reset circuit bythe auxiliary power supply, and not the main power supply.
 10. Anelectronic device comprising: a processor; a main power supply; and arestart apparatus comprising: an auxiliary power supply; a resetcircuit; and an isolation circuit, wherein the reset circuit isconfigured to provide a first signal to the isolation circuit inresponse to a failure of the processor, wherein the isolation circuit isconfigured to isolate the main power supply from the auxiliary powersupply in response to the first signal so that power is supplied to thereset circuit by the auxiliary power supply, and wherein the resetcircuit is configured to generate a reset signal for restarting theprocessor with the power supplied by the auxiliary power supply.
 11. Theelectronic device of claim 10, wherein a first terminal of the mainpower supply is connected to a first voltage terminal, a second terminalof the main power supply is connected to a first ground terminal, afirst terminal of the auxiliary power supply is connected to a firstvoltage terminal, and a second terminal of the auxiliary power supply isconnected to a second ground terminal, and wherein the isolation circuitcomprises: a first transistor configured to disconnect the first groundterminal and the second ground terminal in response to a first signalfrom the reset circuit; and a first current limiter configured to limitcurrent flow through the body diode of the first transistor.
 12. Theelectronic device of claim 11, wherein the isolation circuit comprises:second and third transistors, connected in series with each other, andconfigured to disconnect a second terminal of the main power supply fromthe first ground terminal in response to the first signal from the resetcircuit.
 13. The electronic device of claim 10, wherein the auxiliarypower supply comprises a capacitor.
 14. The electronic device of claim10, wherein the restart apparatus comprises: a discharge circuitconfigured to release residual charges in the electronic device inresponse to a failure of the electronic device.
 15. The electronicdevice of claim 10, wherein the restart apparatus comprises: a clockswitching circuit configured to switch a clock frequency of the resetcircuit from a first clock frequency to a second clock frequency inresponse to a failure of the electronic device, wherein the first clockfrequency is greater than the second clock frequency.
 16. A method,comprising: monitoring operation of an electronic device; isolating amain power supply of the electronic device from an auxiliary powersupply of the electronic device in response to a failure of theelectronic device so that power is supplied to a reset circuit by theauxiliary power supply; and generating a reset signal for restarting theelectronic device with the power supplied by the auxiliary power supply.17. The method of claim 16, wherein isolating the main power supply fromthe auxiliary power supply comprises: controlling a first transistorwith a first signal generated by the reset circuit to disconnect themain power supply from the auxiliary power supply; and limiting currentflow through the body diode of the first transistor.
 18. The method ofclaim 16, comprising: releasing residual charges in the electronicdevice through a discharge circuit after isolating the main power supplyfrom the auxiliary power supply.
 19. The method of claim 16, comprising:switching a clock frequency of the reset circuit from a first clockfrequency to a second clock frequency in response to a failure of theelectronic device, wherein the first clock frequency is greater than thesecond clock frequency.
 20. The method of claim 16, comprising:recording each failure of the electronic device.